Parameshwara, Shubha, Dr. Ambedkar Institute of Technology, India

• Vol 14, No 6: December 2024 - Circuits and Electronics
  Effective ethernet controller protocol architecture verification strategy using system Verilog
  Abstract  PDF

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International Journal of Electrical and Computer Engineering (IJECE)
p-ISSN 2088-8708, e-ISSN 2722-2578

This journal is published by the Institute of Advanced Engineering and Science (IAES).