Fettach, Mohamed, Hassan II-Casablanca University, Morocco

• Vol 12, No 2: April 2022 - Circuits and Electronics
  High-performance FPGA implementation of the secure hash algorithm 3 for single and multi-message processing
  Abstract  PDF

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International Journal of Electrical and Computer Engineering (IJECE)
p-ISSN 2088-8708, e-ISSN 2722-2578

This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).