Singh, Ajay Kumar, University Melaka Malaysia, Malaysia

• Vol 10, No 2: April 2020 - Electronics_Engineering_II
  Threshold voltage model for hetero-gate-dielectric tunneling field effect transistors
  Abstract  PDF

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International Journal of Electrical and Computer Engineering (IJECE)
p-ISSN 2088-8708, e-ISSN 2722-2578

This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).