Ramanaiah, Kota Venkata, Yogi Vemana University/YSR Engineering College of YVU, India

• Vol 14, No 4: August 2024 - Circuits and Electronics
  Field-programmable gate array implementation of efficient deep neural network architecture
  Abstract  PDF

This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.

International Journal of Electrical and Computer Engineering (IJECE)
p-ISSN 2088-8708, e-ISSN 2722-2578

This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).