A Polynomial Digital Pre-Distortion Technique Based on Iterative Architecture

Abstract

A digital predistortion (DPD) technique based on an iterative adaptation structure is proposed for linearizing power amplifiers (PAs). To obtain proper DPD parameters, a feedback path that converts the PA’s output to a baseband signal is required, and memory is also needed to store the baseband feedback signals. DPD parameters are usually found by an adaptive algorithm by using the transmitted signals and the corresponding feedback signals. However, for the adaptive algorithm to converge to a reliable solution, long feedback samples are required, which increases hardware complexity and cost. Considering that the convergence time of the adaptive algorithm highly depends on the initial condition, we propose a DPD technique that requires relatively shorter feedback samples. Specifically, the proposed DPD iteratively utilizes the short feedback samples in memory while keeping and using the DPD parameters found at the former iteration as the initial condition at the next iteration. Computer simulation shows that the proposed technique performs better than the conventional technique, as the former requires much shorter feedback memory than the latter.