FinFET technology: a comprehensive review on materials, structures, fabrication, and device performance
Abstract
As semiconductor devices become smaller, FinFETs have replaced traditional planar MOSFETs. Planar devices face issues like weak electrostatic control and high leakage current at small sizes. FinFETs solve these problems with a three-dimensional structure and multigate design. This improves gate control and reduces short-channel effects. This paper explains FinFET design, materials, and fabrication methods. It highlights how fin geometry affects current flow and device performance. Gate-source voltage (VGS) and drain-source voltage (VDS) are important parameters. These control the device operation in the lin-ear, saturation, and pinch-off regions. Performance factors such as on/off current ratio (ION /IOFF), subthreshold swing (SS), and drain-induced barrier lowering (DIBL) show that FinFETs work well for low-power and high-speed uses. Achieving uniform doping below 5 nm remains difficult. Atomic layer deposition (ALD) helps improve doping control. In summary, FinFETs play a key role in modern semiconductor design by improving scalability and efficiency.
Keywords
Drain-induced barrier lowering; Fin field-effect transistor; High-k dielectrics; ION /IOF F current ratio; Subthreshold swing (SS) short-channel effects
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PDFDOI: http://doi.org/10.11591/ijece.v16i1.pp89-101
Copyright (c) 2026 Yead Rahman, Md Faiaz Al Islam, Nafiya Islam, Sunzid Hassan, Sabbir Alom Shuvo, Iftesam Nabi, Jarif Ul Alam

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International Journal of Electrical and Computer Engineering (IJECE)
p-ISSN 2088-8708, e-ISSN 2722-2578
This journal is published by theĀ Institute of Advanced Engineering and Science (IAES).