High-speed field-programmable gate array implementation for mmWave orthogonal frequency-division multiplexing transmitters: design and evaluation

Abstract

This paper presents a field-programmable gate array (FPGA)-based implementation of an orthogonal frequency-division multiplexing (OFDM) transmitter signal processing chain optimized for high-speed millimeter wave (mmWave) communication systems. The design prioritizes real-time processing efficiency and flexibility. A high-throughput 2048-point inverse fast Fourier transform (IFFT) module, realized using a Radix-2 algorithm, forms the core of the design, showcasing efficient hardware resource utilization. The implementation further includes cyclic prefix (CP) insertion and configurable support for various quadrature amplitude modulation (QAM) modulation orders and pilot arrangements. The design is implemented in VHSIC Hardware Description Language (VHDL) using Vivado 2020 and evaluated on the Zynq UltraScale+ RFSoC ZCU111 evaluation kit. The processing pipeline employs eight parallel lanes for concurrent data computation. Experimental results demonstrate a mean squared error (MSE) of only 0.00013 between the FPGA-generated waveform and its MATLAB-simulated counterpart. Additionally, post-implementation resource utilization analysis shows efficient usage of FPGA resources. These findings validate the efficacy and real-time capability of the proposed FPGA-based OFDM transmitter leverages parallelism and high-speed architecture to efficiently process massive data streams, making it suitable for a wide range of mmWave OFDM applications. In contrast to recent works that focus on lower-order IFFT modules, this paper employs a high-throughput IFFT computation, showcasing efficient hardware resource utilization for high-speed mmWave applications.