Optimizing power consumption in novel electrical design for single ended comparator circuit

Fadi Nessir Zghoul, Wafaa Migdadi, Mamoun Al-Mistarihi

Abstract


Contemporary society electronic technology has evolved into a pivotal component across various facets of our lives. Its indispensability is particularly evident in the advancement of medical, agricultural, industrial, and other sectors. As this technology continues to play a crucial role, optimizing its performance in terms of speed, accuracy, and energy consumption becomes paramount. This paper introduces a novel electrical design for the threshold inverter quantization comparator circuit aiming to meet the evolving demands of modern electronic applications. The proposed design enhances the classic threshold inverter quantization comparator’s performance by significantly reducing its power consumption. Through rigorous mathematical analysis and simulation results it is demonstrated that the proposed comparator design achieves a remarkable 50% reduction in power consumption compared to the conventional threshold inverter quantization comparator. Subsequently the newly devised design is applied to the construction of a 4-bit flash analog-to-digital converter using 0.35 μm complementary metal–oxide–semiconductor (CMOS) technology.

Keywords


Analog to digital converter; Complementary metal oxide semiconductor; Flash analog to digital converter; Single ended comparator; Switching voltage

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DOI: http://doi.org/10.11591/ijece.v15i1.pp208-223

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International Journal of Electrical and Computer Engineering (IJECE)
p-ISSN 2088-8708, e-ISSN 2722-2578

This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).