Hardware-in-the-loop setup for enhanced modular multi-level converter with reduced circulating currents

Jahangeer Badar Soomro, Khawaja Haider Ali, Abdul Aziz Memon


Owing to its essential features, such as modularity and exceptional power quality, the modular multilevel converter (MMC) emerges as the optimal converter topology for high-voltage direct current (HVDC) applications. Traditionally, MMCs are controlled through a method called nearest level modulation (NLM), which generates N+1 AC output voltages, where N represents the number of sub modules (SMs) per arm. In this paper, we introduce a modified NLM technique designed to yield 2N+1 and 4N+1 levels, with a focus on efficiently controlling internal dynamics. The proposed MMC is evaluated using a hardware-in-the-loop (HIL) environment to obtain real-time simulation outcomes. This MMC topology demonstrates a reduction in circulating currents and capacitor voltage ripple.


Capacitor voltage ripples; Circulating current; Hard-ware-in-the-loop; Modular multilevel converters; Real time simulation

Full Text:


DOI: http://doi.org/10.11591/ijece.v14i2.pp1448-1458

Creative Commons License
This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.

International Journal of Electrical and Computer Engineering (IJECE)
p-ISSN 2088-8708, e-ISSN 2722-2578

This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).