Design and implementation of a low-cost circuit for medium-speed flash analog to digital conversions

Abstract

Despite the considerable advancements in analog-to-digital conversion (ADC) circuits, many papers neglect several crucial considerations: Firstly, it does not ensure that ADCs work well in the software or hardware. Secondly, it is not certain that ADCs have a wide range of amplitude responses for the input voltages to be convenient in many applications, especially in electronics, communications, computer vision, CubeSat circuits, and subsystems. Finally, many of these ADCs need to look at the suitability of the proposed circuit to the most extensive range of frequencies. In this paper, a design of a low-cost circuit is proposed for medium-speed flash ADCs. The proposed circuit is simulated based on a set of electronic components with specific values to achieve high stability operation for a wide range of frequencies and voltages, whether in software or hardware. This circuit is practically implemented and experimentally tested. The proposed design aims to achieve high efficiency in the sampling process over a range of amplitudes from 10 mV to 10 V. The proposed circuit operates at a bandwidth of frequencies from 0 Hz to greater than 10 kHz in the simulation and hardware implementation.