Development and evaluation of a 2oo3 safety controller in FPGA using fault tree analysis and Markov models

Fatima Ezzahra Nadir, Mohammed Bsiss, Benaissa Amami

Abstract


The Safety integrity level (SIL) is a measure of the reliability and availability of a safety instrumented system. SIL determination involves qualitative and quantitative analysis based on international standards such as IEC 61508 and IEC 61511. Several techniques can be used to analyze safety instrumented systems, including reliability block diagrams, fault tree analysis, and Markov models. The aim of this paper is to design and evaluate a pressure control system for a compressed nitrogen tank using a PID controller implemented in a field programmable gate array with 2 out of 3 architecture. This architecture ensures the safety of measurements and command of the system through a voting arrangement. The availability of the system is determined by the redundancy and the one hardware failure tolerance. The quantitative analysis is performed by calculating the probability of failure on demand per hour using Markov models or a relevant probabilistic approach based on fault tree analysis. The Markov model method gives the probability of failure of the system in different states during the system life cycle. The fault tree analysis method determines the probability of failure of the system using its equivalent failure rate. Furthermore, this paper compares the SIL result obtained by each model.

Keywords


M out of N voting architecture; Fault tree analysis; Field programmable gate array; Hardware fault tolerance; Markov models; Probability of failure on demand per hour; Safety integrity level

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DOI: http://doi.org/10.11591/ijece.v14i2.pp1496-1507

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International Journal of Electrical and Computer Engineering (IJECE)
p-ISSN 2088-8708, e-ISSN 2722-2578

This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).