Design and performance analysis of front and back Pi 6 nm gate with high K dielectric passivated high electron mobility transistor

Yadala Gowthami, Bukya Balaji, Karumuri Srinivasa Rao

Abstract


Advanced high electron mobility transistor (HEMT) with dual front gate, back gate with silicon nitride/aluminum oxide (Si3N4/Al2O3) as passivation layer, has been designed. The dependency on DC characteristics and radio frequency characteristics due to GaN cap layers, multi gate (FG and BG), and high K dielectric material is established. Further compared single gate (SG) passivated HEMT, double gate (DG) passivated HEMT, double gate triple (DGT) tooth passivated HEMT, high K dielectric front Pi gate (FG) and back Pi gate (BG) HEMT. It is observed that there is an increased drain current (Ion) of 5.92 (A/mm), low leakage current (Ioff) 5.54E-13 (A) of transconductance (Gm) of 3.71 (S/mm), drain conductance (Gd) of 1.769 (S/mm), Cutoff frequency (fT) of 743 GHz maximum oscillation frequency (Fmax) 765 GHz, minimum threshold voltage (Vth) of -4.5 V, on resistance (Ron) of 0.40 (Ohms) at Vgs=0 V. These outstanding characteristics and transistor structure of proposed HEMT and materials involved to apply for upcoming generation high-speed GHz frequency applications.

Keywords


front and back pi gate; high K dielectric material; passivation layers; silicon dioxide; technology computer aided design tool;

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DOI: http://doi.org/10.11591/ijece.v13i4.pp3788-3795

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International Journal of Electrical and Computer Engineering (IJECE)
p-ISSN 2088-8708, e-ISSN 2722-2578

This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).