Transmission line short circuit analysis by impedance matrix method
Abstract
Fault analysis is the process of determining the magnitude of fault voltage and current during the occurrence of different types of fault in electrical power system. Transmission line fault analysis is usually done for both symmetrical and unsymmetrical faults. Symmetrical faults are called three-phase balance fault while unsymmetrical faults include: single line-to-ground, line-to-line, and double line-to-ground faults. In this research, bus impedance matrix method for fault analysis is presented. Bus impedance matrix approach has several advantages over Thevenin’s equivalent method and other conventional approaches. This is because the off-diagonal elements represent the transfer impedance of the power system network and helps in calculating the branch fault currents during a fault. Analytical and simulation approaches on a single line-to-ground fault on 3-bus power system network under bolted fault condition were used for the study. Both methods were compared and result showed negligible deviation of 0.02% on the average. The fault currents under bolted condition for the single line-to-ground fault were found to be 4. 7244p.u while the bus voltage is 0. 4095p.u for buses 1 and 2 respectively and 0. 00p.u for bus 3 since the fault occurred at this bus. Therefore, there is no need of burdensomely connecting the entire three sequence network during fault analysis in electrical power system.
Keywords
bus impedance matrix; fault analysis; power system; symmetrical fault; unsymmetrical fault;
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PDFDOI: http://doi.org/10.11591/ijece.v10i2.pp1712-1721
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International Journal of Electrical and Computer Engineering (IJECE)
p-ISSN 2088-8708, e-ISSN 2722-2578
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).