New Dead-Time Compensation Method of Power Inverter using Carrier Based Sinusoidal Pulse-Width Modulation

Suroso Suroso, Daru Tri Nugroho, Toshihiko Noguchi

Abstract


A new dead-time compensation method of power inverter circuits is suggested and presented in this paper. The proposed method utilizes carrier based sinusoidal pulse width modulation technique to produce driving signals of the inverter power switches with dead-time correction capability. The proposed method able to eliminate dead-time effects such as reducing the waveform distortion of the inverter output current, and increasing the fundamental component amplitude of output current. An analysis of the proposed method is presented. Some computer simulations were carried out to investigate the principle operation, and to test performance of the new method. The developed method was validated through experimental test of H-bridge voltage source inverter circuits. The data obtained from the computer simulation and prototype experiments have confirmed that that the proposed method worked well compensating the dead-time in the voltage source power inverter circuits.


Keywords


a state of charge; energy storage system; interconnected microgrid; load frequency control; spinning reserve

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DOI: http://doi.org/10.11591/ijece.v8i6.pp4880-4891

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International Journal of Electrical and Computer Engineering (IJECE)
p-ISSN 2088-8708, e-ISSN 2722-2578

This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).