Modeling and Simulation of Biaxial Strained P-MOSFETs: Application to a Single and Dual Channel Heterostructure
Abstract
The objectives of this work are focused on the application of strained silicon on MOSFET transistor. To do this, impact and benefits obtained with the use of strained silicon technology on p-channel MOSFETs are presented. This research attempt to create conventional and two-strained silicon MOSFETs fabricated from the use of TCAD, which is a simulation tool from Silvaco. In our research, two-dimensional simulation of conventional MOSFET, biaxial strained PMOSFET and dual channel strained P-MOSFET has been achieved to extract their characteristics. ATHENA and ATLAS have been used to simulate the process and validate the electronic characteristics. Our results allow showing improvements obtained by comparing the three structures and their characteristics. The maximum of carrier mobility improvement is achieved with percentage of 35.29 % and 70.59 % respectively, by result an improvement in drive current with percentage of 36.54 % and 236.71 %, and reduction of leakage current with percentage of 59.45 % and 82.75 %, the threshold voltage is also enhaced with percentage of: 60 % and 61.4%. Our simulation results highlight the importance of incorporating strain technology in MOSFET transistors.
Keywords
biaxial strain; CMOS technology; SILVACO-TCAD; strained silicon layers
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PDFDOI: http://doi.org/10.11591/ijece.v8i1.pp421-428
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International Journal of Electrical and Computer Engineering (IJECE)
p-ISSN 2088-8708, e-ISSN 2722-2578
This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).