Low Power Pesudo-Random Number Generator Based on Lemniscate Chaotic Map

Mohamed Saber Elsayes, Marwa Eid

Abstract


Lemniscate Chaotic Map (LCM) has many advantages compared to different chaotic maps such as wide range of control parameters, cancelling the need for several rounds of substitutions, and providing good performance in the confusion process. The main drawback of LCM is the high power consumption of its hardware model as a result of using four Read-Only Memory (ROM) to implement the two equations of LCM. This paper provides analysis, design, and implementation of the LCM with three alternative hardware models. The paper presents a proposed low power hardware implementation of LCM called Practical Lemniscate Chaotic Map (P-LCM) by the using of trigonometric identities to reduce the complexity of the conventional model. The three different hardware models are designed using Xilinx System Generator (XSG) program with 32 bits fixed-point format and implement into the same Field Programmable gate Array (FPGA) board, Spartan-6 SLX45FGG484-3. The implementation results show a 48.3 % reduction in used resources, and a 34.6 % reduction in power consumption between the conventional LCM and proposed P-LCM. We also proposed a new pseudo number generator based on a proposed P-LCM model and provides statistical analysis to determine the randomization tests.

Keywords


Chaotic map; Lemniscate chaotic map; Random Number Generator; Read only memory (ROM); FPGA

References


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DOI: http://doi.org/10.11591/ijece.v11i1.pp%25p
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