A two-stage power amplifier design for ultra-wideband applications

Idrees S. Al-Kofahi, Zaid Albataineh, Ahmad Dagamseh


In this paper, a two-stage 0.18 μm CMOS power amplifier (PA) for ultra-wideband (UWB) 3 to 5 GHz based on common source inductive degeneration with an auxiliary amplifier is proposed. In this proposal, an auxiliary amplifier is used to place the 2nd harmonic in the core amplified in order to make up for the gain progression phenomena at the main amplifier output node. Simulation results show a power gain of 16 dB with a gain flatness of 0.4 dB and an input 1 dB compression of about -5 dBm from 3 to 5 GHz using a 1.8 V power supply consuming 25 mW. Power added efficiency (PAE) of around 47% at 4 GHz with 50 Ω load impedance was also observed.


CMOS; low noise amplifier; power amplifier; topologies; ultra-wideband (UWB);

Full Text:


DOI: http://doi.org/10.11591/ijece.v11i1.pp772-779

Creative Commons License
This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License.

International Journal of Electrical and Computer Engineering (IJECE)
p-ISSN 2088-8708, e-ISSN 2722-2578