Design and analysis of optimized CORDIC based GMSK system on FPGA platform

Renuka Kajur, K V Prasad

Abstract


The Gaussian Minimum Shift Keying (GMSK) is one of the best suited digital modulation schemes in the Global System for Mobile communication (GSM) because of its constant envelop and spectral efficiency characteristics. Most of the conventional GMSK approaches failed to balance the digital modulation with efficient usage of spectrum. In this article, the hardware architecture of the optimized CORDIC-based GMSK system is designed, which includes GMSK Modulation with the channel and GMSK Demodulation. The modulation consists of Non-Return Zero (NRZ) encoder, an integrator followed by Gaussian filtering and Frequency modulation (FM). The GMSK demodulation consists of FM Demodulator, followed by differentiation and NRZ Decoder. The FM Modulation and demodulation use the Optimized CORDIC model for an In-phase (I) and Quadrature (Q) phase generation. The optimized CORDIC is designed by using quadrant mapping and pipelined structure to improve the hardware and computational complexity in GMSK systems. The GMSK system is designed on the Xilinx platform and implemented on Artix-7 and Spartan-3EFPGA. The hardware constraints like area, power, and timing utilization are summarized. The comparison of the Optimized CORDIC model with similar CORDIC approaches is tabulated with improvements.

Keywords


Differentiator; Digital frequency synthesizer; FPGA; Frequency demodulation; Frequency modulation; GMSK; Integrator; Pipelined CORDIC



DOI: http://doi.org/10.11591/ijece.v10i5.pp%25p
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