Accurate leakage current models for MOSFET nanoscale devices

Abdoul Rjoub, Mamoun Mistarihi, Nedal Al Taradeh

Abstract


This paper underlines a closed forms of MOSFET transistor’sleakage current mechanisms inthe sub 100nmparadigm.The incorporation of draininduced barrier lowering (DIBL), Gate Induced Drain Lowering (GIDL) and body effect (m) on the sub-threshold leakage (Isub) wasinvestigated in detail. The Band-To-Band Tunneling (IBTBT) due to the source and Drain PN reverse junction were also modeled witha close and accurate model using a rectangularapproximation method (RJA). The three types of gate leakage (IG) were also modeled and analyzed for parasitic (IGO), inversion channel (IGC), and gate substrate (IGB).In addition, the leakage resources due to the aggressive reduction in the oxide thickness (<5nm) have been investigated. Simulation results using HSPICEexhibits a tremendous agreement with the BSIM4 model. The dominant value of the sub-threshold leakage was due to the DIBL and GIDL effects. Various recommendations regarding minimizing the leakage current at both device level and the circuit level were suggested at the end of this paper

Keywords


Band to Band Tunneling (BTBT), Compact Metal Oxide Semiconductor (CMOS), Drain Induced Barrier Lowering (DIBL), Gate induced Drain Lowering (GIDL), Gate Leakage (IG), Short Channel Effect (SCE), Sub Threshold Leakage (Isub).

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DOI: http://doi.org/10.11591/ijece.v10i3.pp2313-2321
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ISSN 2088-8708, e-ISSN 2722-2578