A new multiplier less memcapacitor emulator with non-linear applications

Abstract

This study describes a memcapacitor emulator without a multiplier that make use of second-generation current conveyor (CCII), operational trans-conductance amplifier (OTA) and the fewest possible passive components. The proposed memcapacitor is proved mathematically and verified using several simulation approaches, such as process corner, non-volatile and hysteresis analysis. Also, provided the layout of CCII and OTA as well. The standard CMOS 90 nm technology is used in the Cadence Virtuoso tool to simulate the proposed memcapacitor emulator. This article also includes the use of memcapacitor emulator in the applications of R-C frequency selective network as well as adaptable neuromorphic structure. To investigate the experimental outcomes, an experimental setup was constructed with commercially available integrated circuits (ICs) CCII’s AD844AN and OTA’s CA3080EZ.