Low power pseudo-random number generator based on lemniscate chaotic map

Mohamed Saber, Marwa M. Eid

Abstract


Lemniscate chaotic map (LCM) provides a wide range of control parameters, canceling the need for several rounds of substitutions, and excellent performance in the confusion process. Unfortunately, the hardware model of LCM is complex and consumes high power. This paper presents a proposed low power hardware model of LCM called practical lemniscate chaotic map (P-LCM) depending on trigonometric identities to reduce the complexity of the conventional model. The hardware model designed and implement into the field programmable gate array (FPGA) board, Spartan-6 SLX45FGG484-3. The proposed model achieves a 48.3 % reduction in used resources and a 34.6 % reduction in power consumption compared to the conventional LCM. We also introduce a new pseudo-random number generator based on a proposed low power P-LCM model and perform the randomization tests for the proposed encryption system.

Keywords


Chaotic map; FPGA; lemniscate chaotic map; random number generator; read-only memory (ROM);

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DOI: http://doi.org/10.11591/ijece.v11i1.pp863-871

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International Journal of Electrical and Computer Engineering (IJECE)
p-ISSN 2088-8708, e-ISSN 2722-2578

This journal is published by the Institute of Advanced Engineering and Science (IAES) in collaboration with Intelektual Pustaka Media Utama (IPMU).