A 27-MHz frequency shift keying wireless system resilient to in-band interference for wireless sensing applications

A 27-MHz wireless system with binary frequency shift keying (BFSK) modulation at 400-kHz is reported. The receiver has been designed to handle in-band interference corrupting the BFSK signal with the use of complex filters and amplitude comparison method. The BFSK modulation is carried out with a voltage-controlled oscillator before up-converting with a 27-MHz local oscillator. The bipolar junction transistors (BJT-based) power amplifier with 30% efficiency pumps 220 mW into a spiral antenna. The inductive-degenerated low-noise amplifier with a voltage of more than 30 dB amplifies an incoming signal before feeding into a mixer for complex direct down conversion. With deliberate Gaussian interference injection, the minimum ratios between the signal with interference and the interference only at the distance of 2.5, 10 and 15 m are 3.3, 8.5 and 11.5 dB, respectively at a maximum data rate of 20 kbps. Without any interference included, the system can achieve a data rate of 40 kbps at the maximum transmission distance of 15 m. Conceptually agreed with the presented bit-error-rate (BER) analysis, the BER measurements with Gaussian and single-tone/two-tone in-band interferences also confirm superiority offered by the amplitude comparison method where the signal-to-noise ratio is at 1 dB for BER=10 -3 at 10 kbps (10 dB better than the phase detection counterpart).


INTRODUCTION
The frequency shift keying (FSK) modulation [1]- [4] plays a significant role in wireless communication applications for the present and future technological demands [5]- [9], [10]- [13]. In wireless sensor networks, millions of devices and sensors are seamlessly connected together over limited spectral bandwidth. The restricted spectrum bandwidth could practically make interference among these devices unavoidable. To avoid severe interference from an adjacent-channel image signal and to maintain receiver's power consumption at the minimum without circuit complexity, a direction-conversion or zero-intermediate frequency (zero-IF) architecture is usually selected in modern wireless receiver [14]- [16]. Although this direct-conversion receiver structure can effectively remove such image signal, an in-band interference still poses a major design challenge. This is a quite difficult scenario where the wanted and undesired signals are sitting inside the same frequency band and they cannot be separated by means of simple filtering.
In order to withstand the in-band interference without any complicate coding and multiple-access methods, a simple FSK modulation can be employed for low-cost wireless sensor nodes since its frequency-division nature (i.e. the modulated carrier signal sits at different places on the spectrum according to the information values) could help combat the interference [13], [17]- [22]. More specifically, in the case of FSK modulation with a direct-conversion receiver, a phase comparison method has long been a popular choice as a data-bit extraction part of the FSK demodulation process owing to its simplicity [23]- [26]. This phase comparison technique usually employs a digital logic circuit. A small down-converted signal needs to be amplified and limited for logic operation. This thus makes the phase detecting method prone to interference causing a high bit-error rate unless special techniques are employed [24]- [26].
A key feature of the direct-conversion binary frequency shift keying (BFSK) receiver explored in this work is its ability to handle in-band interference when an appropriate demodulation and data bit extraction technique has been exercised. Specifically, an amplitude comparison technique after complex filtering is investigated and compared with a well-established phase detection method. With a mathematical analysis on bit-error rate (BER) comparing to the phase detection technique, the frequency-energy conversion counterpart co-operating with complex filtering and amplitude comparison process shows superior tolerant capability to a significant level of in-band interference. A 27 MHz wireless system concept has been implemented and tested with low-cost discrete components to demonstrate this interference resilient property of the studied FSK receiver. BFSK modulator, power amplifier (PA), low-noise amplifier (LNA), up and down conversion mixers as well as the core BFSK demodulators have been constructed from easy-to-find integrated-circuit and semiconductor components to illustrate promising versatility of the proposed architecture. The system has been thoroughly tested for both wireline and wireless connections where inband interferences (Gaussian, single-tone and two-tone) has been injected at the intermediate frequency (IF) band on the transmitter end. BER measurements and extensive experimentation under various interference conditions strongly suggested that the proposed receiver system significantly outperforms the phase-detection system but with not much extra cost on circuit complexity.
A receiver system architecture and proposed method are reviewed in section 2 where bit-error rate analysis has also been carried out to compare the well-known phase detection technique to its amplitude comparison method. The important circuit building blocks employed in the proposed system are explained in section 3. Various experimentation methods and measured results are described and summarized in section 4 before concluding the study in section 5.

SYSTEM ARCHITECTURE DESIGN AND PROPOSED METHOD
A conceptual spectrum diagram for direct down-converting BFSK signal from a radio frequency (RF) band to 0 Hz (zero-IF) before extracting the digital data bits is depicted in Figure 1(a). The direct down conversion is done with a complex local-oscillator (LO) signal, SLORx(t)=ALOexp(jLORxt). This renders a complex binary signal around +1 and -0 representing bits "1" and "0", respectively (typically, |1|=|−0|=) as shown as the signal SZIF(t) at the bottom of Figure 1(a), so the main complex signal for the bit data will be = (+ 1 ) for bit "1" (1a) By focusing only on the data signals of SZIF(t) in time domain with all the images and interference removed for simplicity as illustrated on left of Figure 1(b) which is corresponding to the "1" (red) and "0" (blue) bit spectrum, the data bit can be directly extracted by phase comparison between I and Q signal parts because of the different phase shift during different data bits [23]- [26]. Alternatively, this SZIF(t) can be passed on to two complex filters with their center frequencies at +1 and -0, where the data bits can be recovered by amplitude comparison since the complex filter would only pass a complex signal on one side of 0 Hz [27], [28]. In this work both bit extraction techniques are employed and compared under deliberate in-band interference injection. The 27 MHz FSK wireless radio transmission architecture is illustrated in Figure 2 where Figures 2(a) and 2(b) illustrates the transmitter and the receiver, respectively.

Transmitter
The 1-bit binary pseudo-random binary sequence (PRBS) signal modulates a 400-kHz carrier signal with a voltage-controlled oscillator before being up-converted by 27-MHz with a Gilbert mixer. The RF signal power (centered at 27.4 MHz) is boosted using a power amplifier to drive an antenna for RF electromagnetic radiation. A wideband Gaussian noise can be deliberately added to the FSK signal as interference for system evaluation.

Receiver
An in-coming RF signal from an antenna is voltage amplified by a low-noise amplifier (LNA) before feeding into a down-conversion mixer to perform a direct down conversion with a complex local oscillator (LO) signal (27.4 MHz) to obtain the complex signal SZIF(t) as in Figure 1(a). This SZIF(t) is then channeled into two different paths: i) being filtered by two complex filters (+j/˗j complex filters) whose center frequencies sit at +/˗ rad/s on the opposite side of 0 Hz prior to detecting the signal amplitudes and recovering data bits by amplitude comparison [also known as a frequency-to-energy conversion technique], and ii) being filtered by real lowpass filters before performing bit recovery by phase detection using a D flipflop. The phase comparison technique looks simpler than its amplitude comparison counterpart due to less circuit complexity. However, with a high level of in-band interference in the system, phase detection technique can be much more severely disturbed and rendering incorrect data recovery. The reason behind this comes from the fact that the amplitude comparison technique takes signals from two complex filters where the impact from any interference appearing at both complex filters can be greatly reduced by comparison process. But in the case of phase detection, the signal has to be amplified and limited before entering a phase detector such as a D flip-flop, this limiting step can be highly erroneous when interference is significantespecially, with an in-band random interference where no simple kind of analog filter can be employed to remove it.

Bit-error-rate analysis and comparison for the two detection methods
A simplified BER analysis comparing between the two techniques in the subsequent section will be carried out to verify the aforementioned assumption. In this simple analysis it is assumed that the in-band interference gets through the complex filters and the lowpass filters in both types of bit detection methods. Due to a number of circuit building blocks inside the presented receiver/demodulator architectures, the following BER analysis only serves for a comparison purpose between two-bit recovery techniques and it does not precisely represent the actual BER of the really complicated demodulator structures or the actual wireless channel.

Phase detection with a D flip-flop (DFF) after lowpass filtering
To simplify the BER analysis, as illustrated in Figure 3 it is assumed that the Gaussian interference disturbs only the signal received from the I path at DFF's data terminal, SID as in Figures 3(a) and 3(b). While the signal from the Q path entering the DFF's clock node, SQCLK is clean, i.e., the source of bit error comes from SID only. Thus this optimistic BER analysis of the phase detection technique is simply an issue of detecting error bits from the signal SID which is a fairly standard BER calculation [29]. For a single supply system, the logic signal switches between 0 and VA, the probability density function (pdf) of the Gaussian-interfered SID is as depicted in Figure 4 and the BER of the phase detection technique, BERPD can be expressed as [29].
Where n is the interference's rms voltage where VTh (=VA/2) is the threshold voltage level for logic decision.
Q(x) is widely known as a Q function and its value can only be found by approximation [30].

Amplitude comparison after complex filtering
For simplification, it is again assumed that the uncorrelated Gaussian interferences are present at both inputs of the comparator SCP and SCN after complex filtering and amplitude detection process as in  Figure 5. Figure 5(a) shows how interferences enter the comparator while Figure 5(b) displays disturbed time-domain signals. The first two graphs in Figure 6 show the probability density functions (pdf), PSCP(x) and PSCN(x) of the signals SCP and SCN at the comparator's inputs. For a single supply system, it is assumed that the pre-amplitude-detected signal swings between VA and 0 rendering the ideal amplitudedetected/rectified voltage level at VA and 0, where  is a rectification factor with 0<1. The comparator mathematically performs a subtracting task between SCP and SCN before limiting the difference, and if the difference (SCP-SCN) is greater (or lower) than zero, this implies that bit "1" (or "0") would be detected. Therefore, the BER can be computed from the pdf of SCP-SCN, i.e., P(SCP-SCN) which can be seen as the convolution of PSCP(x) and P(-SCN(x)) (the pdf of the -SCN signal). Using the proof developed in [31], [32] if PSCP(x) and PSCN(x) are and when bit "1" is sent, P(SCP-SCN) can be expressed as Similarly, when bit "0" is sent, P(SCP-SCN) can be expressed as These ( − )@"1" ( ) and ( − )@"1" ( ) are also shown as the last graph in Figure 6. The BER is the total probability of the error bit detection, i.e., For simplicity, = = and the BER of the amplitude detection technique, BERAD is reduced to Specifically, if the amplitude detection process can manage 1/2 of VA, i.e. =1/2, then BERAD=0.5 (0.5 / ) which is still an improvement by a factor of two as compared to the phase detection technique. Noting that under a single supply system with square-wave signaling, the ratio (0.5 / ) is technically a signal to noise ratio (SNR), but if the signal under consideration is sinusoidal, the (0.5 / ) is instead equal to 2SNR. Comparison plot of BER as a function of SNR between BERPD and BERAD for a square-wave signaling scenario with =1 are illustrated in Figure 7. It is important to note that the SNR under consideration in these analyses is at the inputs of bit extraction circuitries (a comparator or a phase detector) and not at the actual input of the demodulator. Moreover, in the presented BER analysis, correlation of the noise/interference signals at the comparator's and the phase detector's inputs have not been taken into account. However, these simple BER graphs can be used to serve for a comparison purpose between the twobit extraction techniques. If the interferences at the comparator's inputs are correlated (they actually are, to a certain extent), the BER graphs would definitely be better than those in Figure 7.

A power amplifier (PA)
For simplicity, a class-A PA in Figure 8(a) is employed [15]. The main bipolar junction transistors (BJT) is biased with a current mirror to allow a large Vce voltage swing with the cost of PA's power efficiency (PE) wasted in the current mirror. In this work, a discrete KSP10 is used for the BJT. The antenna impedance is transformed to 25  (instead of 50 ) for the PA's output load so that more power can be delivered to the antenna due to a limited voltage swing (ideally at 2VCC peak-to-peak). Assuming a sinusoidal voltage swing at the load, the ideal maximum power delivered to the load RL is V 2 CC/2RL. The PA's efficiency and maximum output power is plot against input frequency in Figure 8

Low-noise amplifier (LNA)
A class-A inductive degenerated low-noise amplifier of Figure 9(a) is employed with KSP10 [15], [16]. The LNA's s-parameters s11 and s21 with respect to a 50  reference system is shown in Figures 9(b) and 9(c), respectively. The s11 of -10 dB widely extends from 15 to 40 MHz well covering the operation for this wireless transmission system. The voltage gain is also measured as depicted in Figure 9

A polyphase filter and an envelope detector
A 3 rd -order RC polyphase filters as shown in Figure 10 [33], [34] has been used for complex filtering followed by a simple 2 nd -order RC lowpass filter in the receiver as part of the amplitude comparison technique for data bit extraction. Note also that a differential 5 th -order RC passive lowpass filter has been used for the phase detection method. A BJT-based amplitude detector circuit in Figure 11 (developed from [35], [36]) has been used for amplitude detection with a single supply of 5 V. Discrete transistors BC547 and BC558 have been employed in this work.   Figure 11. A BJT-based amplitude detector circuit

EXPERIMENTATION, RESULTS AND DISCUSSION
The complete system has been tested for both wire-line and wireless setups. The two aforementioned bit recovery techniques have been extensively compared. Measured results are described here.

Wire-line system test
Without the PA and the LNA involved, the output of the Tx's up-conversion mixer has been directly connected to the input of the Rx's down-conversion mixer. The results in time-domain are shown in Figures 12(a) and (b) and 13(a) and (b). In Figure 12, with no interference added to the modulated signal, both bit extraction techniques are working correctly where the phase detection technique does win on the basis of system simplicity and slightly lower power consumption.
To test interference resilience of the system, Gaussian noise has been deliberately added to the BFSK signal in front of the up-conversion mixer as indicated in Figure 12(a). This interference (together with the BFSK carrier) is also translated to be well inside the RF transmission band around 27.4 MHz. The results are as illustrated in Figure 13 with in-band interference at a significant level, the amplitude comparison technique with two complex filters can still operate correctly while its phase detection counterpart fails and continuously produced erroneous recovered bits. On the right side of Figure 13(a), we can see that the phase shift between the I/Q signals have been severely disturbed and this leads to incorrect bit recovery. It is important to note that the injected interference with frequency around 400±50 kHz (in-band) severely degrades bit extraction functionality by the phase detection method.

Wireless system test
The transmitter, Tx and the receiver, Rx are separated by some physical distance with a clear line of sight as shown in Figure 14(a). The double-sideband spectrum at the power amplifier's input is depicted in Figure 14(b). The lower sideband signal and the 27-MHz LO leakage are clearly visible. These unwanted signals will not be strongly suppressed by the PA and LNA due to their rather low-quality factors. However, this will not be a serious issue owing to the direct-conversion receiver architecture where these undesired out-of-band interference can be easily removed by the baseband real lowpass filters or the complex filters. Figure 15 demonstrates the operation at a distance of 10 meters with and without interference as shown in Figures 15(a) and (b) are from phase and amplitude detections, respectively. Both bit recovery techniques can perform correctly under low interference level as shown on the left side of Figures 15(a) and 15(b). On the right-hand side, the figures show how the high in-band interference level can severely corrupt the data extraction process using phase detection while the amplitude comparison method after the two complex filters can still function correctly. The result suggests that a smart receiver could alternately select an appropriate bit recovery method according to the present interference level so that trade-off between bit-error rate (BER) and power consumption can be well balanced.
The minimum Corrupted signal-to-in-band interference+noise ratio (cSibINR)-measured at the outputs of the complex filters, is the smallest ratio between power of the modulated signal corrupted by the interference+noise, PSig±inf_noi and power of the in-band interference+noise without the modulated signal, Pibinf_noi, that allows the receiver with the complex-signal amplitude-comparison technique still perform correctly at a 20-kbps data rate while its phase detection counterpart practically fails, i.e., this cSibINR can be expressed by (18).  Figure 13(b) indicates how cSibINR of the complex-signal amplitude-comparison technique can be measured for a wire-line test. From the experiment, the phase detection technique always fails at these minimum cSibINR levels recorded for the amplitude comparison technique. This result confirms its inferiority under a highly interfered environment. Plots of the received power level measured at the LNA's input and the minimum cSibINR against the transmission distance is shown in Figure 16. Figure 16(a) shows the LNA's input power while Figure 16

Bit-error rate measurement
The BER has been measured with a wire-line connection setup where the transmitter is directly connected to the receiver i.e., the power amplifier, low-noise amplifier and antennae have been omitted. The received data bits have been retimed, digitized and compared with its transmitted counterpart by mean of digital logic processing on a field-programmable gate array (FPGA) (Xilinx Zybo zynq 7000 [37]). The results are as depicted in Figure 17 for both methods of bit extraction at 5 k, 10 k, 20 kbps. Noting that the signal-to-noise ratio (SNR) in this graph has been measured at the input of the receiver/demodulator (the receiver mixer's input)-not at the comparator or the phase detector's inputs as considered for the BER analysis in section 2.3. It is obvious that the amplitude-detection method offers much superior performance over its phase-detection counterpart (as theoretically predicted by the calculations in Figure 7) where the SNR is at 1 dB for BER=10 -3 at 10 kbps (10 dB better than the phase detection counterpart).  Similar to [26], the tolerance to in-band interference has also been tested with the system being subjected to single-tone and two-tone in-band interferences around the modulating frequency of 400 kHz as shown in Figure 2(a). The sensitivity results are plotted in Figure 18 where the signal-to-interference ratio

181
(SIR) has been measured at BER=10 -3 at 10 kbps. The frequency offset is a frequency deviation from the modulating frequency (=400 kHz) of a single-tone interference as shown in Figure 18(a) or of a common frequency of the two-tone interferences as shown in Figure 18(b), the two-tone frequency difference was fixed at 100 kHz. The SIR sensitivity level in Figure 18(c) is plotted against a frequency span from the two-tone common frequency (fixed at 400 kHz). From the measured results in Figure 18, a smaller SIR level at BER=10 -3 strongly suggests that the amplitude detection technique outperforms its phase comparison counterpart. Table 1 summarizes the performance of the transmission system. (c) Figure 18. Compared sensitivity at BER=10 -3 at 10 kbps: (a) single-tone interference, the offset is measured from 400-kHz, (b) the two-tone common frequency as offset from 400-kHz, and (c) with a fixed two-tone common frequency and a symmetrical frequency span   ) 11 dB (phase detection) for data rate=20 kbps 7.9 dB (amplitude detection) 11.8 dB (phase detection)

CONCLUSION
A 27-MHz BFSK wireless radio system has been reported. The receiver employs a direct conversion with complex filtering and amplitude comparison for recovering digital data. This helps make the receiver more tolerant to any in-band or out-of-band interference as compared to a well-established phase comparison technique. The system has been successfully verified with measurements using off-the-shelf discrete components. In the future study, number of components and power consumption can be further reduced by employing a single complex filter. This will be integrated in a standard complementary metal oxide semiconductor field effect transistor (CMOS) technology and reported in another literature.