Nonlinear control strategy of single-phase unified power flow controller

Received Aug 13, 2020 Revised Dec 29, 2020 Accepted Jan 19, 2021 In this work we propose a nonlinear control strategy of single-phase unified power flow controller (UPFC), using in order to enhance energy quality parameters of a perturbed single-phase power grid supplying nonlinear loads. The control objectives are: i) The current harmonics and the reactive power compensation, that ensure a satisfactory power factor correction (PFC) at the point of common coupling (PCC); ii) compensation of the voltage perturbations (harmonics and sags of voltage) in order to ensure the desired level, of load voltage, without distortion; iii) DC bus voltage regulation. The considered control problem entails several difficulties including the high system dimension and the strong system nonlinearity. The problem is dealt with by designing a nonlinear controller with structure including three control loops. The inner-loop regulator is designed using the Lyapunov technique to compensate the current harmonics and reactive power. The intermediary-loop regulator is designed using the Backstepping technique to compensate the voltage perturbations. The outer-loop regulator is designed using a linear PI to regulate the DC bus voltage. The control stability is proved theoretically and through simulations, these latter show the effectiveness and strong robustness of the proposed control, and prove that the above-mentioned objectives are achieved.


INTRODUCTION
Nowadays, the increased use of computer equipments and power electronics-based devices on electrical grids contributes to the degradation of the electrical energy quality. In fact, the power electronics dedicated to electrical engineering as well as the electronics of computer equipments essentially contribute to the proliferation of harmonic disturbances. These devices, called nonlinear or distorting loads, generate harmonic currents which cause the distortion of the voltage waveform at the PCC (due to load current in the grid impedance) [1]. In addition, the presence of these harmonic disturbances in electrical installations becomes a real 'headache' for producers and users of electricity in the industrial, tertiary and domestic sector. Now, the concerns of distributors and consumers of electricity focus on improving the power factor. The harmonic pollution that affects the electricity supply grid has led electricity producers and distributors to Int J Elec & Comp Eng ISSN: 2088-8708  Nonlinear control strategy of single-phase unified power flow controller (Younes Abouelmahjoub) 2865 take this new constraint seriously into account with a view to finding solutions for a better of the electrical energy quality. In recent times, active power filters (APFs) have proved to be the best modern solution to cope with electrical power quality issues. Various APFs configurations exist namely: shunt APF [2][3][4], series APF [5] and UPFC system [6], which combines both parallel and series structures of APF. The UPFC system injects at PCC, appropriate current and voltage signals of harmonics compensation, which ensure the cancellation of all disturbing harmonics, in the electrical distribution networks, upstream of the PCC [7][8][9][10][11][12][13][14][15].
In this study, we are interested in single-phase UPFC system connected between the perturbed power grids and the nonlinear loads. The problem of controlling single-phase UPFC system has arouse a great of interest over the last years. In this respect, several control strategies have been proposed. The work [16] presented a microcontroller program used to control the single-phase UPFC system. The obtained experimental result showed a good agreement with the simulation result. The paper [17] proposed a real-time control system for a single-phase UPFC, both obtained simulation and experiment results have proved the effectiveness of the proposed control system. In [18], an attempt was made to separate the series part and the shunt part of UPFC, this gives the possibility to install series and shunt parts of UPFC at different required locations. Finally the responses of two modified DC link UPFC are compared. In [6], an implementation for controller to control the single-phase UPFC using the DSP-TMS320C31 is developed. In [19], a new hybrid technique which combines the radial basis function (RBF) neural network with the sliding mode technique is proposed to design a UPFC system for power flow control of an electric power transmission system. In [20], a proportional resonant (PR) controller is used to generate switching signals for each leg of the input fullbridge converter; by synthesizing an appropriate injection voltage, the half-bridge inverter controls the power flow of the transmission line; in addition to simulation of system by MATLAB/Simulink, an experiment realization on the UPFC was carried out. In all the previous studies, the objective was controlling the power flow in the transmission systems between the power grids and the consumer loads in order to improve the quality of electrical energy; but note that the performances of the controllers which were proposed in [6,[16][17][18][19][20][21] were not quantified by the indication of the current THD and the voltage THD. Furthermore, in most previous works, the grid internal impedance was supposed to be zero [6,16,18,19]. In real life, this impedance is nonzero and must be considered in single-phase power grid model.
In the present paper, the problem of controlling single-phase UPFC system, associated with perturbed single-phase power grids supplying nonlinear loads, is addressed considering reduced-part topology. A novel nonlinear controller is designed and formally shown to meet the PFC requirement, the compensation of the voltage perturbations, and the regulation of DC bus voltage. A major feature of the new control design is that none of the limitation of previous controllers is present i.e. the grid internal impedance is not neglected. The structure of proposed nonlinear controller contains three control loops. The inner-loop is designed, using the Lyapunov technique, to ensure a perfect PFC. The intermediary-loop is designed, using the Backstepping technique, to compensate the voltage perturbations. The outer-loop is established in order to regulate the DC bus voltage, through filtered PI regulator. The closed-loop control system analysis is presented in this paper to proof, that all control objectives are actually achieved by the proposed controller. Several simulation results show that additional robustness features are reached. Compared to the controllers previously cited, the new nonlinear controller enjoys several features including:  The present controller is designed for the single-phase UPFC system with reduced topology, this latter features less switches and a smaller number of gate drivers, compared to the Two-Leg Full-Bridge topology used in [6,18,19,20]. As a result, the present nonlinear controller is simpler to implement because it involves less control signals to generate and apply.  The control design proposed, in works [6,16,18,19], relies upon very restrictive assumption e.g. the internal impedance of the single-phase power grid was supposed to be zero [6,16,18,19] which entails an approximate model used in control design (because the model dimension is smaller than that of the true system). The present study does not rely on this above assumption. Therefore, the system model used in the control design is of higher dimension leading to a higher performances controller.  The performances of the proposed controller were quantified by calculation of the THD values of current and voltage. Such a study based in terms of THD current and voltage was missing in the all previous works [6,[16][17][18][19][20][21].  By using a rigorous theoretical analysis, the control objectives (i.e. PFC, compensation of voltage perturbations and DC voltage regulation) are actually achieved. Such a formal analysis was missing in the all previous works [6,[16][17][18][19][20][21]. This paper organized as follows: Section 2 is devoted to the description and modeling of the singlephase UPFC system. The design of the nonlinear controller is treated in section 3. The closed-loop control system analysis is presented in section 4. In section 5, the controller performances are illustrated by several numerical simulations.

Single-phase UPFC topology
The proposed single-phase UPFC system is shown in Figure 1. It contains two inverters back-toback, connected to the DC bus side including two identical energy storage capacitors . The IGBT-diode based inverters operate in accordance with PWM [22,23]. From the AC side, the single-phase UPFC system is connected on the one hand in parallel with the perturbed power supply grid through filtering inductor ( , ), on the other hand in series with a nonlinear load via filtering inductor ( , ), capacitor and current transformer. The perturbed power grid is modeled by a disturbed voltage source in series with an internal impedance formed by a resistor and an inductor .
The switching functions and of the single-phase UPFC system are defined as: ; The load current , in steady-state, is a periodic signal that can be expressed as (1). (1) where is the current harmonic amplitude of order , is the « h » harmonic phase at the origin.

Single-phase UPFC modeling
The instantaneous model of the single-phase UPFC system is given by:

if S is ON and S is OFF if S is OFF and S is ON
where is the transformation ratio of current transformer, 0 = 1 + 2 and 0 = 1 − 2 . The model (2a-f) is useful for building up an accurate simulator of the UPFC system. However, it cannot be based upon in the control design as it involves binary control inputs, namely and . This type of difficulty is generally overcome by resorting to average models where instantaneous signals are replaced by their average shapes. The signals are averaged over cutting intervals [22,24]. The average model of the single-phase UPFC system is expressed as (3a), (3b), (3c), (3d), (3e), (3f): where: 1 , 2 , 3 , 4 , 5 , 6 , , are respectively the averaged variables , , , , , , , .

CONTROLLER DESIGN
The proposed nonlinear controller for the system (3a-f) represented by Figure 2 will be developed in three major steps, respectively devoted to: i) the inner loop design, ii) the intermediary loop design, iii) and the outer loop design. The first step is to design an inner-loop control, using the Lyapunov technique, to ensure a perfect PFC. The second step is to design an intermediary-loop control, using the Backstepping technique, to ensure the compensation of voltage perturbations in the power grid. In the third step, an outerloop control, involving filtered PI regulator, is built-up to achieve DC bus voltage regulation.

Current inner-loop design
According to the PFC requirement, the current 1 provided by the single-phase power supply grid must be a sinusoidal signal in phase with the fundamental of grid voltage namely 1 . To this end, the current 2 injected by the single-phase UPFC system should follow as closely as possible its reference 2 * as (4).
where 1 = 1 sin( ), and is any positive constant. As a matter of fact, the latter is allowed to be timevarying but it must converge to a constant value. That is, stands as an additional control input. To achieve the PFC objective, we introduce the tracking error on the filter current . Using (3b), the time-derivative of (5) yields the following dynamics of the error 1 .
The control variable, noted , appears in (6) after a single derivation of the error 1 . This control variable must now be determined in order to make 1 -system globally asymptotically stable. To this end, we introduce the following Lyapunov function candidate: Its dynamic is given by: To ensure 1 -system global asymptotical stablity, it is sufficient to choose the control law so that ̇1 = − 1 1 , and then we obtain: (9) where 1 is any positive parameter. Comparing (9) and (6) yields the following control law: As this control law involves the dynamics of the signal , it follows from (6) that the signal and its first time-derivative must be available.

Voltage intermediary-loop design
In order to compensate the voltage disturbances at the PCC, the load voltage must be a sinusoidal signal at the terminals of sensitive load: (11) According to the voltage disturbances compensation requirement, the series voltage 3 injected by the single-phase UPFC system should follow as closely as possible its reference signal 3 * as (12).
where is the voltage at the point of common coupling. The proposed regulator must force the voltage 3 to track its reference signal 3 * . The synthesis used is known as the Backstepping technique [25] and is carried out in two steps.  Step 1: Stabilization of tracking error 2 .
The time-derivative of (13) yields the following dynamics of the error 2 : We use the following Lyapunov candidate function: 2 22 2 Vz  Consider that ( 4 / ) is the effective control, is the stabilizing function, it is sufficient to take: where 2 is a positive parameter.
To study the stability of the above control, we define the following corresponding error 3 : Then, we get the equation of 2 dynamics, and that of 2 derivative:  Step 2: Stabilization of the subsystem ( 2 , 3 ) In this step 2, we present the design of the controller that makes the errors ( 2 , 3 ) to tend to zero. The 3 dynamics is given in (21): The control variable, noted , appears for the first time in (21). Let us consider the following Lyapunov function. ( 2) V V z  (22) Using (20), the time-derivative of 3 is given by: (23) To ensure that the ( 2 , 3 )-system to be globally asymptotically stable, it is sufficient to choose the control law so that which, due to (23), amounts to ensuring that: where 3 is a positive parameter. From the (21) and (24), we deduce the following backstepping control law : Remark: The control laws (10) and (25) involve a division by the DC bus voltage 5 , there is no risk of singularity (division by zero) in steady state because, in practice, the DC bus voltage remains all the time positive. Otherwise, the two power converters of the UPFC system cannot work.

Voltage outer-loop design
According to the DC bus voltage regulation requirement, the outer-loop regulator generates an adjustment law for the signal so that the DC bus voltage 5 is regulated to its reference value 5 * . To this end, the relation between and the voltage 5 is established see in Figure 2.
The expression of 2 1 2 3 ( , , , , , ) f z z z t  is complex and so is no cited in this paper. The signal stands as a control input of the system (26b). The problem is to design for a tuning law so that the squared voltage = 5 2 tracks its reference * = 5 * 2 . At this stage, the signal and its first time-derivative must be available, the following filtered PI regulator is adopted: 6 Theorem 1. We consider the single-phase UPFC system shown in Figure 1, represented by its average model (3a-f), in closed-loop with the nonlinear controller including the following components:  The inner-loop regulator (10) ,  The control parameters ( 1 , 2 , 3 , 4 , 5 , 6 ) are chosen so that the following inequalities hold:  a a a b  a a a a  b  b a b a  a b a a b a b b  a   b a a a  a b a b b  b a a  a b a b Then, there exist positive constants * and * such that for all 0 < < * , the system (28a-b) has a unique exponentially stable (2

NUMERICAL SIMULATION
The control system described in Figure 2 is simulated using the MATLAB/SIMPOWER toolbox (V.R2013a). The controlled system is a single-phase UPFC which is connected between the disturbed power supply grid and the nonlinear load based on a bridge rectifier, the latter supplying a load composed of resistor in series with inductor . The inductor 0 protects the bridge rectifier against abrupt voltage changes. The numerical values, of single-phase UPFC system parameters, are placed in Table 1.

Control performances in presence of harmonics at power grid voltage
The simulation vises at illustrating the controller behavior in response to step changes of the DC bus voltage reference 0 * . Taking into account the system parameters values of Table 1, the simulation profile is described by Figure 3 which shows that the DC bus voltage reference switches from 800 V to 900 V at time (0.25 s) and return up to its nominal value at time (0.6 s) while the load is kept constant ( =20 Ω, =500 mH). In this case, the circuit is supplying by a polluted power grid which its voltage contains the harmonics. The resulting controller performances are illustrated by Figures 3-10. The DC bus voltage 0 converges to its reference value with a good accuracy see in Figure 3. Furthermore, it is observed that the voltage ripple oscillates at the frequency of 2 , but its amplitude is quite small see in Figure 3 compared to the average value of the signal 0 . Figure 4 shows the waveform of the load current . It is seen that the latter presents a serious harmonic distortion. Figure 5 reveals a serious distortion in the voltage of the power supply grid. Its calculated harmonic distortion rate is around (%) = 24.58%, which recommends performing compensation. To better appreciate the controller performances, Figure 6 clearly shows that the grid current remains sinusoidal all the time and in phase with the fundamental of the grid voltage namely 1 . This confirms that a satisfactory PFC is well ensured. Also, Figure 7 shows that the voltage , at the terminals of the nonlinear load after compensation, becomes sinusoidal. This confirms that the voltage perturbations compensation is well ensured. Figure 8 shows the load current spectrogram, where the THD value of this current equal to 32.04%. Figure 9 shows that the THD value of grid current after compensation is very low (3.82%). This latter value is below the limits of the IEEE-519 standard. Figure 10 shows the grid voltage spectrogram, where its THD value equal to 24.58%. Figure 11 shows that the THD value of load voltage after compensation is very low (0.68%). This latter value is below the limits of the IEEE-519 standard.  Figure 12 to Figure 16 illustrating the behavior of the proposed controller in the presence of the voltage sags in the power grid. Indeed, Figure 12 reveals a sag in the signal of the grid voltage , the depth of which is 90% of the nominal voltage and its duration is 100 ms, which exceeds the values fixed by the standard EN 50160. Figure 13 clearly shows that the grid current remains sinusoidal all the time and in phase with the grid voltage . This confirms that a satisfactory PFC is well ensured. As for Figure 14, it shows that the voltage at the terminals of the nonlinear load after compensation is a sinusoidal signal, in this case the voltage sag decreases sharply and its depth becomes 7% which is less than the value of 10% imposed by standard EN 50160. The harmonics spectrum of the load current is plotted in Figure 15, it is noted that the THD value of this current equal to 32,04%. It is observed in Figure 16 that the THD value of grid current equal to 3.82%. This latter value is below the limits according to IEEE-519 standard.

CONCLUSION
The problem of controlling the single-phase UPFC system of Figure 1 is addressed in presence of disturbed single-phase power grid supplying nonlinear loads. The complexity of the control problem resides in the high dimension and the nonlinearity of the system dynamics. The proposed nonlinear controller, including the inner regulator (10), the intermediary regulator (25) and the outer regulator (27a-b), is developed by using various tools of control e.g. Lyapunov technique, Backstepping technique. It is shown that all control objectives are achieved, including PFC requirement, voltage perturbation compensation, and DC bus voltage regulation. The simulation results illustrate and prove the high performances of the proposed controller and its strongest robustness. The extension of the present study to the case of three-phase UPFC system is underway, and also an adaptive nonlinear control strategy taking into account the uncertainty on the grid impedance applied to single-phase UPFC system is underway.