A new structure of a wide band bridge power limiter

Received Oct 31, 2019 Revised Feb 25, 2020 Accepted Mar 4, 2020 In this work, new design and simulation of a microstrip power limiter based on Schottky diode is presented. The proposed circuit is a zero bias power limiter built by associating a transmission line in parallel to a four Schottky rectifier bridge circuit. The first circuit using a single stage rectifier is analyzed and simulated. To improve this single stage, a second and final limiter is designed with two stages rectifier. Simulation results for the final circuit show an ideal limiter behavior and good performance of limiting rate up to 20dB for a threshold input power varying from 5 dBm to 30 dBm. While insertion loss remains low at small signal.

In this work, commercial HSMS286B Zero-Bias Schottky diode [20] are used to design a low cost microstrip power limiter operating at a frequency of 2.45 GH. The proposed power limiter can reduce the amplitude of a large input signal of 30 dBm by 10 to 20 dB. Two types of microwave limiter can be distinguished: active power limiter that requires external current and self-biased limiter operating without DC bias.
The proposed microwave limiter is a self-biased limiter built on two microstrip lines. The first linear line transmits the main signal while the other line is associated to a rectifier bridge constituted of four Schottky diodes. When an incoming signal exceeds Schottky diodes threshold, the rectifier bridge is self-biased causing the drop of diodes impedance and consequently a portion of incoming signal is diverted to ground. The designed circuit has been optimized to provide more than 15dB attenuation rate at high signal power while assuring a minimum insertion loss at small signal state.

DESIGN APPROACH
A simplest solid state limiters consists of one stage diodes or MESFET transistors connecting a line transmission to ground as presented in Figure 1 [21]. In order to take advantage of the variation of its impedance as a function of the electric current flowing through it, the diode used to limit the power is placed in anti-parallel form between the transmission line and the common ground. Consequently, when the input power increases, the diode impedance drops down, and some of the received power is diverted to ground. These limiters must present minimal losses for incoming signals under certain threshold power, however beyond this threshold level, losses must be proportional to the incident power [22]. Such circuit must be equipped with a bias voltage which allows the diode or the MESFET transistors to switch to forward state. The implementation of a bias voltage in microwave system could generate noise and be a source of uncontrolled behavior. However, it is possible to generate the necessary DC biasing current by choosing Zero-Bias diodes [21,22] and using a detector diode as shown in Figure 2. The detector diode will transform a part of incident signal to DC current as used in rectenna systems [23,24]. On the other hand, the return DC current is ensured by an RF Choke or by the limiter diode itself.

Figure 2. Toplogy of zero bias limiter
In the proposed circuit, we use full wave rectifier bridge circuit topologies optimized for microwave circuit operating at ISM band and using four Schottky diodes. This technique is widely used for rectenna systems and for remote energy harvesting [25,26] and power detector [27]. As mentioned previously, we chose the Avago HSMS286B commercial diode for validation and design of the proposed circuit. This diode is a surface-mount Schottky RF diode presented in the SOT23/143 package [20].
The HSMS286x family data sheet shows that these diodes are optimized for RF applications from 915 MHz to 5.8 GHz. They are used for large signals detection, modulation and rectification of RF signals [20,24]. Since Advanced Design System (ADS) software is suitable for RF design and natively contains the different HSMS286x families in its library, we used it to validate and simulate the proposed circuit. We validated two circuits in terms of frequency band, insertion loss in small signal mode and attenuation rate when the power received exceeds the threshold limit of the limiter. The circuit is designed by using microstrip technology, based on FR4 substrate with the following parameters: -Relative dielectric constant: 4.4 -Substrate thickness: 1.6mm -Dielectric Loss tangent: 0.025

CIRCUIT OPERATION
The proposed circuit introduces a new design of a solid state power limiter. The circuit uses a power divider of two lines: The main transmission line in parallel with a second line where we insert a full wave bridge rectifier as depicted in Figure 3. At low power incoming signal, the Schottky diode impedance remains very high because the bridge doesn't activate the rectification. Consequently, the input signal is transmitted to the load with a minimum insertion loss. When the circuit is exposed to a high amplitude signal which exceeds the detection threshold of the Schottky diode, a DC current generated will force the diode impedance to drop down. As a result, part of the incident signal is deflected to the ground.
In order to increase the attenuation level of the circuit, the length of the central line is chosen equal to half wavelength while the diodes are implanted at a distance of half wavelength from the point of derivation. This structure makes a phase shift of 3λ/2 between the signal crossing the main transmission line and the signal crossing the rectifier bridge. The microstrip layout of the circuit is illustrated below in Figure 4.

Modelisation of rectifier structures
Rectifiers are implemented in this limiter circuit to generate DC current required to bias Schottky diode. Generally, RF-DC conversion circuits are based on Schottky diodes. Schottky diodes are selected due to their low junction capacity and low threshold voltage. To analyze the rectifier structure, we consider the equivalent layout of the second line as presented in Figure 5.
Before analyzing this circuit, we need to replace Schottky diodes D1 to D4 by their equivalent lumped circuit. When diodes D1 and D3 receive a positive half cycle Up*sin(ωt), D2 and D4 will be under negative half cycle Up*sin(ωt+) because the distance between D1and D2 is equal to /2. Since D1 and D2 are in opposite each to other, they will both be in forward bias, while D3 and D4 will be in reverse bias. This above description will be applied for the negative cycle of the signal reaching the diodes D1 and D3. In this situation, diodes D3 and D4 will be the forwarding state and the diodes D1 and D2 will be in the reverse state.
In conclusion, the full wave bridge can be replaced by two diodes at forwarding state and two diodes at reverse state. Hence the bridge in Figure 5 is equivalent to the circuit presented in Figure 6. In Figure 6,  Figure 7 shows a simplified equivalent circuit of a Schottky diode in forward and reverse bias state. Where: R s : series resistance R j : variable resistance as a function of current flowing through the diode C j : the junction capacity

Circuit with one stage
The circuit presented in Figure 4 has been optimized and validated using ADS software. Figure 8 shows the s-parameters simulation. The output power versus input power is presented in Figure 9. At an input power of 30dBm, the limiting rate is almost 12dB. S-parameters simulation illustrated in Figure 5 shows that the limiter has good matching input impedance in the ISM band. The insertion loss is established at approximately 0.9 dB from 2 to 4 GHz. However, this structure has certain limitations: -High limiting power threshold: the device block high power input signal it reaches 10dBm.
-Attenuation obtained at large signal (12 dB at Pin=30 dBm) is not sufficient to protect sensitive devices. In order to overcome the above mentioned limitations, we have designed a second circuit consisting of two rectifying bridges.

Circuit with two stages
The improved circuit is formed by two rectifier bridges in parallel with a microstrip transmission line. However, the antidopal lines are replaced by a semicircle in order to reduce circuit dimension. The final circuit is presented in Figure 10. The S-parameters results simulations at small signal and limiting characteristics simulations at high input power are presented in Figure 11. The two-stage circuit has a better isolation rate compared to the single-stage circuit, while the insertion loss remains in the same level: -Broadband frequency range of 1GHz from 2 to 3.6 GHz -Low insertion loss (-0.9 dB) -The isolation rate reaches 23 dB at 2.45 GHz. Table 1 summarizes a comparison of the proposed circuit with similar limiters reported in scientific literature. It can be seen that the circuit proposed in this paper achieves a small-signal insertion loss below 1 dB and an attenuation up to 23 dB over 1.6 GHz frequency band. In terms of power management, the proposed circuit supports 30 dBm exceeding the performance of MMIC circuits. The proposition in [28] presents nearly similar limitation rate, but with a very small bandwidth (300 MHz). While propositions in [29] and Zhou et al., present MMIC limiters with a high reflection rate and low limitation rate compared to the proposed circuit [30].

CONCLUSION
In this work, we have designed and validated by simulation two microstrip microwave power limiter circuits based on Zero-Bias Schottky diodes. At small signal power, the limiter based on one stage rectifier bridge permits a very low insertion loss around 0.9 dB over 2-4GHz. At High power input, this circuit presents a limitation of 12dB. To improve the isolation at high signal, a two rectifier bridge stages limiter has been designed and validated. This limiter presents quasi-ideal limiting power characteristic and achieves 23 dB of isolation rate and a limiting power threshold observed at 0dBm. The dimensions of the layout generated for this circuit are 58.54 mm x 37.05 mm.